19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS
The work
| Authors | Kuan-Yueh James Shen; Syed Feruz Syed Farooq; Yongping Fan; Khoa Minh Nguyen; Qi Wang; Amr Elshazly; Nasser A. Kurd |
|---|---|
| Editors | |
| Type | misc |
| Year | 2016 |
| Citekey | shen2016194 |
Where it appeared
| Published in | Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference |
|---|---|
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 330--331 |
Identifiers
| DOI | 10.1109/isscc.2016.7418041 |
|---|---|
| OpenAlex | W2291959676 |
Access
| Landing page | https://doi.org/10.1109/isscc.2016.7418041 |
|---|
From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.
Abstract
With recent advancements in SoC integration, modern SoC architectures can employ more than 20 PLLs [1]. To address SoC clocking needs with an ever reducing power budget, a deep sub-mW to low-mW PLL having a FoM between -226dB and -234dB from 0.8GHz to 5GHz is presented. The PLL features a modular implementation and therefore could be used as the local clock source or as part of a clock-generation hub. The hub provides reference clocks to subsystems from a single platform crystal oscillator through a combination of divisions and distributions.
How it got here
| How it got here | agent via openalex |
|---|---|
| Added | 2026-10-27 18:50 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@misc{shen2016194,
title = {19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS},
author = {Kuan-Yueh James Shen and Syed Feruz Syed Farooq and Yongping Fan and Khoa Minh Nguyen and Qi Wang and Amr Elshazly and Nasser A. Kurd},
year = {2016},
journal = {Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference},
publisher = {Institute of Electrical and Electronics Engineers},
pages = {330--331},
doi = {10.1109/isscc.2016.7418041},
}
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