Modelling and Verification in Structured Integrated Circuit Design

The work

AuthorsIrene Buchanan
Editors
Typephdthesis
Year1980
Citekeybuchanan1980modelling

Where it appeared

SchoolUniversity of Edinburgh

Identifiers

handle1842/13224

Related

Distinct frombryant1981switchlevel
Distinct fromcardelli1982algebraic
Distinct fromdhingra1987formal
Distinct fromferres2025survey
Distinct frommelham1987abstraction

From bibtex.

Abstract

Traditional design tools based on geometric representations do not provide an adequate base from which to construct and verify silicon implementations of complex systems. More comprehensive structural, physical and behavioural descriptions must be developed from appropriate representations. This thesis proposes models which may be used to construct unified and consistent descriptions of the structural, physical and behavioural attributes of a design. It also discusses a method of capturing these descriptions using a textual representation embedded in an object oriented programming language. A range of subsystems have been implemented within a design environment tailored to the proposed models of the design activity. In addition to the typical graphical feedback and mask making oriented output a comprehensive list of verification procedures has been integrated into the system. These include dimensional design rule checking, electrical calculations, connectivity verification and simulation at a number of levels of abstraction.

A copy is held

pdf, 16.5 MB. Not published — it may be under copyright. The facts and links here are.

How it got here

How it got hereagent via bibtex
Added2026-09-18 05:57 UTC
Approved bya person 2026-09-18 10:11 UTC

Cite it as

@phdthesis{buchanan1980modelling,
  title        = {Modelling and Verification in Structured Integrated Circuit Design},
  author       = {Irene Buchanan},
  year         = {1980},
  school       = {University of Edinburgh},
}

This record lives at https://refs.drheap.org/buchanan1980modelling/ and will keep doing so.