Design of ion-implanted MOSFET's with very small physical dimensions

The work

AuthorsR. H. Dennard; F. H. Gaensslen; Hwa-Nien Yu; V. L. Rideout; E. Bassous; A. LeBlanc
Editors
Typearticle
Year1974
Citekeydennard1974design

Where it appeared

Published inIEEE Journal of Solid-State Circuits
PublisherIEEE
Volume9
Issue5
Pages256--268

Abstract

This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/. Scaling relationships are presented which show how a conventional MOSFET can be reduced in size. An improved small device structure is presented that uses ion implantation, to provide shallow source and drain regions and a nonuniform substrate doping profile. One-dimensional models are used to predict the substrate doping profile and the corresponding threshold voltage versus source voltage characteristic. A two-dimensional current transport model is used to predict the relative degree of short-channel effects for different device parameter combinations. Polysilicon-gate MOSFET's with channel lengths as short as 0.5 /spl mu/ were fabricated, and the device characteristics measured and compared with predicted values. The performance improvement expected from using these very small devices in highly miniaturized integrated circuits is projected.

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Added2026-08-05 00:00 UTC
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Cite it as

@article{dennard1974design,
  title        = {Design of ion-implanted MOSFET's with very small physical dimensions},
  author       = {R. H. Dennard and F. H. Gaensslen and Hwa-Nien Yu and V. L. Rideout and E. Bassous and A. LeBlanc},
  year         = {1974},
  journal      = {IEEE Journal of Solid-State Circuits},
  publisher    = {IEEE},
  volume       = {9},
  number       = {5},
  pages        = {256--268},
  doi          = {10.1109/jssc.1974.1050511},
}

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