The future transistors
The work
| Authors | Wei Cao; Huiming Bu; Maud Vinet; Min Cao; Shinichi Takagi; Sungwoo Hwang; Tahir Ghani; Kaustav Banerjee |
|---|---|
| Editors | |
| Type | article |
| Year | 2023 |
| Citekey | cao2023future |
Where it appeared
| Published in | Nature |
|---|---|
| Volume | 620 |
| Issue | 7974 |
| Pages | 501--515 |
Identifiers
| DOI | 10.1038/s41586-023-06145-x |
|---|
Related
| Distinct from | chen2024fullcustom |
|---|---|
| Distinct from | gargini2017brief |
| Distinct from | lundstrom2022moores |
| Distinct from | shalf2020future |
| Distinct from | srinivasu2016carbon |
| Distinct from | theis2010quest |
| Distinct from | theis2017moores |
Abstract
The metal–oxide–semiconductor field-effect transistor (MOSFET), a core element of complementary metal–oxide–semiconductor (CMOS) technology, represents one of the most momentous inventions since the industrial revolution. Driven by the requirements for higher speed, energy efficiency and integration density of integrated-circuit products, in the past six decades the physical gate length of MOSFETs has been scaled to sub-20 nanometres. However, the downscaling of transistors while keeping the power consumption low is increasingly challenging, even for the state-of-the-art fin field-effect transistors. Here we present a comprehensive assessment of the existing and future CMOS technologies, and discuss the challenges and opportunities for the design of FETs with sub-10-nanometre gate length based on a hierarchical framework established for FET scaling. We focus our evaluation on identifying the most promising sub-10-nanometre-gate-length MOSFETs based on the knowledge derived from previous scaling efforts, as well as the research efforts needed to make the transistors relevant to future logic integrated-circuit products. We also detail our vision of beyond-MOSFET future transistors and potential innovation opportunities. We anticipate that innovations in transistor technologies will continue to have a central role in driving future materials, device physics and topology, heterogeneous vertical and lateral integration, and computing technologies.
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How it got here
| How it got here | import via bibtex |
|---|---|
| Added | 2026-08-04 00:00 UTC |
| Approved by | a person 2026-08-22 15:07 UTC |
Cite it as
@article{cao2023future,
title = {The future transistors},
author = {Wei Cao and Huiming Bu and Maud Vinet and Min Cao and Shinichi Takagi and Sungwoo Hwang and Tahir Ghani and Kaustav Banerjee},
year = {2023},
journal = {Nature},
volume = {620},
number = {7974},
pages = {501--515},
doi = {10.1038/s41586-023-06145-x},
}
This record lives at https://refs.drheap.org/cao2023future/ and will keep doing so.