Full-Custom 90 nm CNTFET Process Design Kit: Characterization, Modeling, and Implementation

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Abstract

As the semiconductor industry enters the post-Moore era, the carbon nanotube field-effect transistor (CNTFET) has become a powerful substitute for silicon-based transistors beyond 5 nm process nodes due to its high mobility, low power consumption, and ultra-thin-body electrical advantages. Carbon-based transistor technology has made significant progress in device manufacture and preparation, but carbon-based process design kits (PDKs) that meet the standards of commercial design tools are still an important bottleneck hindering the development of carbon-based integrated circuits. For the first time, a complete full-custom 90 nm CNTFET PDK is proposed in this paper, which includes Pcells for transistors, resistors, and capacitors; a compact model; DRC/LVS/PEX rules; and a standard cell and timing library. It can support the entire design flow of analog, digital, and mixed-signal carbon-based integrated circuits. To achieve an accurate compact model, the back-gate effect of CNTFETs and the influence of gate/drain voltage on transport probability are analyzed. Then the theoretical formulas for mobility and channel current are established. The comparison of the simulation and test results of CNTFET characteristics proves the accuracy of the compact model. Using this PDK, combined with standard IC design tools and design flow, the circuit and layout of an operational amplifier, SRAM, and 8-bit counter are completed. The simulation results verify the correctness and effectiveness of the PDK, laying a solid foundation for the large-scale industrialization of carbon-based integrated circuits.