This description was written by a machine and published without a person checking it. It is what the agent made of this grouping, and not a statement anybody has stood behind.
Simon W. Moore
A grouping.
Simon W. Moore, Cambridge Computer Laboratory: the hardware side of the CHERI work the corpus holds, from synthesisable test benches to randomised instruction testing. Five records, 2015 to 2024; naylor2015generic spells him Simon Moore.
5 references
Safe Speculation for CHERI
Franz A. Fuchs and others (2024) · 2024 IEEE 42nd International Conference on Computer Design (ICCD)
Randomized Testing of RISC-V CPUs Using Direct Instruction Injection
Alexandre Joannou and others (2024) · IEEE Design and Test
Architectural Contracts for Safe Speculation
Franz A. Fuchs and others (2023) · 2023 IEEE 41st International Conference on Computer Design (ICCD)
Rigorous Engineering for Hardware Security: Formal Modelling and Proof in the CHERI Design and Implementation Process
Kyndylan Nienhuis and others (2020) · 2020 IEEE Symposium on Security and Privacy (SP)
A Generic Synthesisable Test Bench
Matthew Naylor and others (2015) · 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE)