A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving

The work

AuthorsOussama Oulkaid; Bruno Ferres; Matthieu Moy; Pascal Raymond; Mehdi Khosravian; Ludovic Henrio; Gabriel Radanne
Editors
Typeinproceedings
Year2024
Citekeyoulkaid2024transistor

Where it appeared

Published in2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)
PublisherIEEE
Pages1--6

Related

Contained inoulkaid2025modeles
Distinct frombasin1989verification
Distinct fromferres2023electrical
Distinct fromferres2025survey
Distinct fromgordon1983proving
Distinct fromjoyce1987hardware
Distinct fromlewis2026finding
Distinct fromoulkaid2026modeling

From crossref.

Abstract

We present a novel technique for Electrical Rule Checking (ERC) based on formal methods. We define a relational semantics of Integrated Circuits (IC) as a means to model circuits' behavior at transistor-level. We use Z3, a Satisfiability Modulo Theory (SMT) solver, to verify electrical properties on circuits — thanks to the defined semantics. We demonstrate the usability of the approach to detect current leakage due to missing level-shifter on large industrial circuits, and we conduct experiments to study the scalability of the approach.

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How it got here

How it got hereagent via crossref
Added2026-09-15 21:10 UTC
Approved bya person 2026-09-16 09:30 UTC

Cite it as

@inproceedings{oulkaid2024transistor,
  title        = {A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving},
  author       = {Oussama Oulkaid and Bruno Ferres and Matthieu Moy and Pascal Raymond and Mehdi Khosravian and Ludovic Henrio and Gabriel Radanne},
  year         = {2024},
  booktitle    = {2024 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)},
  publisher    = {IEEE},
  pages        = {1--6},
  doi          = {10.23919/date58400.2024.10546537},
}

This record lives at https://refs.drheap.org/oulkaid2024transistor/ and will keep doing so.